1. Technical Field
The present invention relates to a semiconductor device, and in particular to a semiconductor device provided with a capacitor element.
2. Related Art
In recent years, semiconductor devices having capacitor elements, such as DRAM, have been advancing towards larger capacity and finer dimension of the elements. There has, therefore, been a demand for the capacitor element to ensure large capacity despite small area.
In particular, logic-embedded semiconductor memory devices having a logic section and a memory section provided on the same substrate have been desired to be improved in the operation speed.
Known technologies relevant to the semiconductor devices having capacitor elements include those described in patent documents and by Ravi K. Venkatesan et al., below.
Japanese Laid-Open Patent Publication No. 2003-7854 describes a logic-embedded semiconductor memory device based on a COB (capacitor over bit line) structure containing cylinder-type MIM (Metal Insulator Metal) capacitors. In the cylinder-type MIM capacitor, a lower electrode is formed so as to cover the entire inner wall of a recess formed in an insulating interlayer.
Japanese Laid-Open Patent Publication No. 2006-245364 describes a semiconductor device based on a CUB (capacitor under bit line) structure containing cylinder-type MIM capacitors.
Japanese Laid-Open Patent Publication Nos. 2003-332463 and 2004-235560 describe semiconductor devices based on the CUB structure having parallel flat plate type (planar) MIM capacitors. The semiconductor memory devices based on the CUB structure raise a problem in that any attempt of shrinking the memory cell area may more readily cause short-circuiting between the capacitor elements and bit contact plugs.
Japanese Laid-Open Patent Publication No. 2002-373945 describes an MIM capacitor using a metal oxide film as the capacitor insulating film.
Published Japanese Translation of PCT International Publication for Patent Application No. 2003-520384 describes a technique relevant to a non-volatile memory using an electro-conductive organic film.
Domestic Re-Publication of PCT International Publication for Patent Application No. WO2003-052827 describes a technique relevant to a memory cell using a polymer composed of monomer units containing a sandwich-type coordination compound Ravi K. Venkatesan et al. (“Tapping ZettaRAM™ for Low-Power Memory Systems”, Proceedings of the 11th Int'l Symposium on High-Performance Computer Architecture (HPCA-11 2005), 2005) describes a technique relevant to a memory cell using a self-assembled single molecular film.
U.S. Pat. No. 6,921,475 describes a technique relevant to electrochemical measurement of a self-assembled single molecular film coupled to a sensor.
Published Japanese Translation of PCT International Publication for Patent Application No. 2003-520384, Domestic Re-Publication of PCT International Publication for Patent Application No. WO2003-052827, U.S. Pat. No. 6,921,475 and Ravi K. Venkatesan et al. have described the capacitors using the organic molecule films, but none of them have described specific configurations of the memory devices.
As has been described in the above, despite various investigations into techniques relevant to the capacitor elements, the semiconductor devices still have a room for raising capacitance per unit area of the MIM capacitors, shrinking the memory cell size, and improving the operation speed.